The present disclosure relates to semiconductor structures, and particularly to metal-oxide-semiconductor field effect transistors (MOSFETs) having a cross-coupling between a gate conductor and an active region and methods of manufacturing the same.
Many semiconductor devices require a cross-coupling between an active region of a substrate and a gate conductor. For example, static random access memory (SRAM) devices have a cross coupling between active regions of a substrate and gate conductors through metal contact bars that overlie and contact both a gate conductor and an active region. As the dimensions of SRAM devices shrink in each successive technology node, the spacing between an adjacent pair of active regions and the spacing between adjacent gate conductors have shrunk at a faster rate than the width of a gate conductor. This approach has resulted in an SRAM design having relatively small contact via structures for cross-couple gate conductors and active regions. However, controlling lithographic processes and etch processes for forming such contact via structures have become exceedingly challenging for small scale devices.
Use of local interconnect for SRAM devices makes the problem of controlling lithographic processes and etch processes even more challenging because the contact window for such contact via structures is defined by a window between gate conductor lines, and thus, such contact via structures are expected to result in poor yield and/or reliability. A structure and method for providing a reliable contact structure without resorting to a contact via is desired for scaled down devices.